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Introduction


A completely new architecture

Hyper Pipelined Technology

400 MHz system bus

Rapid Execution Engine

Cache memory and other characteristics

Mathematical operations: FPU and SSE2

How is the Pentium 4 physically

The chipset...: and the memory!

Yield (1)

Yield (2): SSE2 and optimizations

Some prices orientativos

Conclusion: version 1.0?

Released page
12/4/2000


Author:
Juan Herrerías Rey
 

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Intel Pentium 4...: version 1.0?


 

It does a pair of weeks that Intel threw to the market his new microprocessor "covers with stars", the Pentium 4. Since it is logical, we gathered the event in news... And since then some you will have wondered why we had not realized any article on this matter. Logotype of Intel Pentium 4

Well, it will not be because we are not interested in the project; already in February of this year we begin speaking about him in the news section, on the occasion of the IDF (Willamette (Pentium IV?), Timna, RDRAM, DDR... welcome to IDF). But in this case one does not treat a few MHz as a more rapid mike or as one more variant of the nucleus of Pentium II: for good or for evil, it is the biggest change of last 5 years in the technology Intel, and we believed that one was deserving to study the topic thoroughly.

Well, since after reading almost 5 MB of documents official PDF of Intel and the tens of released independent articles on this matter, our conclusions are...

 

A completely new architecture

For any company, the marketing is a very important question, up to the point of determining the proper creation of a product... and of course his name. Due to the enormous success that had the original Pentium (after lowering the voltage and after that one corrected improbable mathematical mistake that... anyway, it is a history), Intel decided to call this way to his following processors, although sometimes not out of the quite logical one.

Thus, if the Pentium MMX was a small variant of the nucleus of the Pentium, Pentium II was not looking alike to him scarcely (it was more advanced enough and was descending straight from Pentium Pro, the first one in using the called architecture P6). And on the other hand, Pentium III (normal and Coppermine), basically is a Pentium II with some progress (perhaps useful, but you would not revolutionize).

Nevertheless, the Pentium 4 has been designed starting almost from the beginning. In particular, it is based on the new architecture NetBurst© (microarchitecture, being purists), which according to Intel is based on the following props:

  • Hyper Pipelined Technology;
  • 400 MHz system bus;
  • Execution Trace Cache;
  • Rapid Execution Engine;
  • Advanced Transfer Cache;
  • Advanced Dynamic Execution;
  • Multimedia unit and of Improved Floating Comma;
  • Streaming SIMD Extensions 2 (SSE2).

Terrible, truth? Well, not everything previous is the same way important, how we will see next. We are going to separate the parts that we believe more important and to explain them in a way as simple as possible; but if nevertheless I created that he will not be able to support it, pulsate here to jump to the physical description of the mike.

 

Hyper Pipelined Technology

Historical evolution of the architectures Intel up to the Pentium 4

This is one of the principal internal changes of the Pentium 4. Let's see how we explain it: inside the microprocessor, the information happens for "pipelines" (channels of information), of a certain number of stages.

In a Pentium with architecture P6 (Pentium Pro, Pentium II, Pentium III and Celeron), the pipeline has 10 stages; in the Pentium 4, there are 20 stages. All the more stages, more it is taken in "liberating" the information, for what when Intel says that this increases the yield... anyway, we suppose that he speaks the marketing department. Of course, other divisions of Intel are more serious and they admit openly that the yield MUST GO DOWN for this motive.

Nevertheless, this has an advantage: it allows to reach major speeds of clock (more MHz). For what Intel looks is to lose part of the yield to be able to recover it by force of MHz (GHz, rather). It is a commitment, and probably logically...: but it is not necessary to disguise it, please!

 

400 MHz system bus

Nothing of what complaining, is one of his best characteristics. Eye because, in fact, there are no 400 "physical", real MHz, but 100 MHz cuádruplemente made use with a species of "double DDR", or since it does the AGP 4X; for it, the multiplier to be selected in the badge for the model of 1,4 GHz (1400 MHz) is 14x, not 3,5x.

These 400 "equivalent" MHz (that it are, the idea works), will improve the yield of "professional" applications and multimedia (like renderizado and video edition), and that of a lot of games 3D.

The magic number of transference that is reached 3,2 GB/s is , while the new AMD Athlon with 266 MHz bus (really "133x2") remains in 2,1 GB/s (of course, very well well used), Pentium III with 133 MHz bus in only 1 GB/s... and the poor person Celeron, with his 66 MHz, in the wretched some 0,5 GB / century

 

Rapid Execution Engine

Another absolute innovation of this new architecture: some parts of the Pentium 4 work to the double of the speed of clock; that is to say: to 3 GHz in the model of 1,5 GHz!!

In particular, these parts are two arithmetical-logical units of points (ALUs). Well, the case is that this sounds wonderfully, and it should make to fly to the mike in applications "not mathematics" (like those of office or many actions of the proper operating system)... but as we will see later, it seems that it does not obtain it, owed very probably to the excess of stages of the pipeline.

 

Cache memory and other characteristics

Description of the nucleus of Intel Pentium 4

The cache memory L2, integrated into the mike and of 256 bits, is a progress of the technology "Advanced Transfer Cache" released with Pentium III; it can reach 48 GB/s in the model of 1,5 GHz. This represents the double of what there can do a Pentium III of the same speed, and it is much more than it can reach an AMD Athlon, especially because in this one the cache memory L2 has a bus of only 64 bits.

As for Execution Trace Cache and Advanced Dynamic Execution, they are boringly technical: they improve the speculative execution and the ramifications prediction (branch prediction), in such a way that... anyway, we say that they try to improve the yield, or rather to relieve the loss of the same one to which it forces the new pipeline.

 


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